infinitely scalable boost converter.

[joestue]

I may have done the impossible.

I may have figured out a way to interleave any reasonable number of boost converters, such as to achieve a nearly zero input and output ripple current.
However the current iteration requires low inductance connections between each of the converters.
I am working on an emulated current ramp to do away with current sense resistors altogether, however this requires a hall effect sensor or ac current transformer on the ac input side to capture the dc component and add it to the current sense comparators

datasheet of the L6562A
http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00151385.pdf

The two phase version works, and with a little bit more optimization, i think i can get rid of the start up glitch.

I'm not sure what kind of power density i can hit with surface mounted Fets.
The limit on the ferrite E cores (which i have several hundred of) at practical switching frequencies is about 500 watts without a bobbin and packed full of copper. but i can't get anywhere near that with these boards due to the heat wasted in the current sense resistors.
 
One option is lots of .1 ohm 1/2th watt resistors standing up on end, rather than surface mount .020 ohm resistors..
however for prototypes i needed very low inductance.

[altosack]

Hi, I'm trying to do a similar thing myself; I know that my DIY hand-soldering skills are only capable of somewhere between 50 and 100 kHz PWM, so in order to move high power relatively efficiently with a small ripple and accurate duty cycle feathering, I'm planning on using multiple phases in my buck and boost converters.  I'll be implementing it with microcontrollers that allow me to have accurate timing between the phases. Phased PWM is relatively rare; it exists in TI DSPs, MicroChip dsPICs, and the Parallax Propeller; the Propeller is the one I've chosen due to its combination of a DIP package and up to about 24 outputs (12 high/low MOSFET pairs; I'll probably be using 4 phases in most controllers; maybe 8 in one of them), although I have to implement the phased PWM in software (OK, that's kinda fun !).

I'm not quite getting how you're doing the timing of the multiple phases, and how the PFC controller chip fits into that.  Can you elaborate on your setup a little ?  What is your control mechanism ?  What did you mean when you said "practical" switching frequencies ?  You said that the 2-phase version works, but it looks like you have 4 phases in your photo; are they not connected yet ?

Wow, so many questions, but this is closer to what I'm doing (OK, what I *plan* to do) than anything I've seen posted in a long time !

[joestue]

we could discuss it over skype if you want.

here's a thread explaining more.
http://www.edaboard.com/thread285741.html

the method by which it forces interleaving is because each L6562a sees this:


rather than this:


note that the average reading dmm does not reflect the inductor decay rate depicted in the Oscope shot, due to the unfiltered 120 hz ripple.
each phase is running at a very low 17Khz, due to the 7 volt input, rather than a more reasonable 35 in, 90vdc out.

i've been trying to take a closer look at the input current ripple, it does not seem to be cancelling out like it should.


i think the way to go about doing this for low voltages (<40 volts dc in) and very high currents it to use an emulated current ramp, and feed the dc signal in via ac current transformers and low pass filters.

another issue is the multiplier input needs to be low pass filtered, but i don't have any data on the frequency response of the onboard multiplier.
i have two 91K resistors in series and a 9.1K resistor to make a 20/1 divider, with a 6.8nF cap on the multiplier input. may need to be bigger, i don't think the 6.8nF cap is doing anything.

seems bumping the input up to 10 volts dc and reducing the error amplifier input to the multiplier solves almost every problem.

[joestue]

By practical switching frequencies i mean switching losses on the same order as conduction losses.
i'm using 100 volt 14mOhm fets, so that's really hard to do, considering the current sense resistors are dumping 3 times the conduction losses, but no switching losses. the inductors are essentially copper loss only, given the very large air gap and the 24 turns of 15 awg wire. --about 3.1 mills per foot, figure 3 feet that is 9m ohms, double it for skin effect.

i'll have to dip the board in lacquer, run the input up to 30-60 vdc un filtered, and let the ouput climb to 90vdc and see what frequencies and losses it runs at with reasonable loads.
--because i didn't know what to expect from the l6562, i chose .02 ohm resistors, and the total current sense resistance is 45 m ohms, i can change this as needed.
i might be able to use 10mohm sense resistors and still get acceptable results.
another limitation is the parasitic inductance of the boost diode.

honestly i think for a 48 volt battery bank you are safe to use 60 volt surface mounted no heatsink mosfets, set the output for 56 vdc maximum running a tight control loop, and you would be fine. use 80 volt fets if you put the boost converter on the tower, to account for line losses
Its possible to run surface traces only and then glue the circuit board to an aluminum plate for cooling, but its a higher inductance path to do that. another option is just heatsink the fets.

i think the way to do it is have multiple switches and inductors per phase, and then you can surface mount everything and avoid heatsinks completely.