Switching losses certainly aren't negligible in many cases but they should be for hard switched pwm into a more or less non inductive resistor.
Here's why:
The flyback diode or catch diode stops conducting long before the switch turns on again.
If this weren't the case, you would see a pronounced non linearity between average current and percent duty cycle above a given XX%, and this XX% would change with the frequency. (essentially, if you try to switch the resistor at say 100 khz, it becomes a really lossy buck regulator instead and returns a fraction of the power back to itself, through the diode)
Additionally you would only see mosfet failures above the critical discontinuous current region, where the catch diode is still dumping current back into the resistor when the fet turns on. (assuming of course that the fet does not die from thermal failure caused by conduction losses being proportional to duty cycle)
All that being said worst case isn't that bad below 100 khz, At 100 khz, the extra 100 ns it takes to turn off the diode would essentially double the switching losses assuming you've already got 100 ns switching, but switching losses are still less than 2,3%, even at 100 khz, assuming hard switching.
If you use a slow diode that takes 400ns to turn off then you might run into problems, because now you're looking at a 4 fold increase in losses.
But in real life its not that easy. Say your 1 ohm resistor has a 2 uH inductance and its on a 48 volt circuit.
current initially rises at 24 amps per microsecond, so for the moment lets assume that it takes 6 uS to turn on, and 6 uS to dump most of the 48 amps back into the resistor. Now we can see that with pwm at 10 KHz, above 94% duty cycle the current never drops to zero. At 1 khz, its more like 99.4%.
(I'm ignoring the resistance here but that doesn't really matter, because these are arbitrarily picked numbers that may individually be accurate but as a whole not very.)
But because there's no current flowing when the fet turns on.. then there's no turn on switching losses! so as long as the fet turns on before the current rises to say 6 amps (would require 250ns turn on, which is rather slow), not only are switching losses less than 250ns/100us, but they are about equal to (250ns/100us) times (6^2/48^2) compared to idealized hard switching.
Here is where we get into causes of failures:
It must be noted that when the switch turns off, the resistor is essentially an ideal 48 amp current source.
if you don't have any capacitance in the system then even 20nH of inductance (an inch of wire) is enough to destroy the mosfet, because the voltage across the inductance of the diode is theoretically infinite.
Figure if the mosfet turns off in 48 ns then the current through the diode must increase from 0 to 48 amps within 48 nanoseconds or the voltage at the fet will be higher than 48 volts; say you *conservatively* rated the fet at 200 volts and now can let the drain voltage rise to 200 volts, which means its ok to let the catch diode take 200 nanoseconds to rise from 0 amps to 48 amps. calculating the inductance needed for a *conservative* .25 amp per nanosecond at 48 volts.. and i find it to be 80 nanohenries, ignoring the capacitance of the switch and pcb, wires etc.*
That's like a total of 4 inches of pcb trace, but nothing out of the ordinary. in fact, you may not even need a snubber if the supply is bypassed with some film capacitors located on the circuit board less than an inch from the diode and fet. Locating the catch diode near the inductor a good distance from the switch may solve this problem but only below critical discontinuous current. What happens to the energy stored in the loop between the fet and the diode when the current becomes continuous at 9X% duty cycle and you have diode recovery current to "absorb"?
Do not forget the inductance of your battery bank! The capacitors on the pwm board must be able to absorb the current stored in the inductance of the battery and leads without an unsafe voltage rise. If you don't have any caps on the board buffering the + and - rail, its a miracle it can survive. (this is one of those cases where a high gate resistance and the miller capacitance enables the mosfet to turn off as slow as it needs to... you can't count on this, it may be turning on and off several times before it actually turned off.)
In short, if you want to be able to get 9X% duty cycle with any resistor then there's no difference in construction requirements between a buck dc-dc converter and a pwm dump load, except for the fact that the diode has near zero heat dissapation, and although you need low inductance caps, you don't need that many of them.
If you limit the duty cycle to 90% you're probably good as far as turn on diode recovery caused failures, but if you have the turn off voltage spike properly accounted for there won't be any diode recovery current caused failures, it will however reduce your turn on switching losses from zero to some non zero figure.
*There's two variables to solve here. a current source into an inductor provides an infinite v/s rise time, the parasitic capacitance of the system is not negligible and takes over quickly
